This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-100926, filed Apr. 8, 1999, the entire contents of which are incorporated herein by reference.
The present invention relates to a so-called xe2x80x9cCOF (Chip On Film)xe2x80x9d technology and provides a bonded structure of a film substrate and a semiconductor-chip and a method of manufacturing the same.
In, for example, a semiconductor device called BGA (ball grid array), a semiconductor chip forming, for example, an LSI is disposed on an interposer, and solder balls are arranged on the lower surface of the interposer to form a matrix. FIG. 17 is a cross sectional view exemplifying a conventional semiconductor device of this type. As shown in the figure, the semiconductor device comprises an interposer 1 having a planar size somewhat larger than that of a semiconductor chip 7 and made of a hard material such as a ceramic material, a glass fiber-containing epoxy resin, etc. An adhesive layer 2 is formed on an upper surface of the interposer 1. First terminals 3 are mounted to the peripheral portion on the upper surface of the adhesive layer 2 in a manner to correspond to bump electrodes 8 mounted to the peripheral portion on the lower surface of the semiconductor chip 7. Second connection terminals 4 are formed at predetermined portions on the upper surface of the adhesive layer 2 in a manner to form a matrix. The first terminals 3 and second terminals 4 are connected to each other vial connection wirings (not shown) formed appropriately on the upper surface of the adhesive layer 2. Circular holes 5 are formed through the interposer 1 and the adhesive layer 2 at positions corresponding to predetermined positions of the second connection terminals 4. Solder balls 6 positioned within and extending downward from the circular holes 5 are connected to the second connection terminals 4. Further, the bump electrodes 8 are respectively bonded to the first connection terminals 3 to allow the semiconductor chip 1 to be mounted on the interposer 1.
In the conventional semiconductor device of the construction described above, the first connection terminals 3, the second connection terminals 4 and the connection wirings connecting these first and second connection terminals 3 and 4 are bonded to the upper surface of the interposer 1 with the adhesive layer 2 interposed therebetween. As a result, it is impossible to displace, particularly, the first connection terminals 3 relative to the interposer 1. It follows that cracks tend to be generated at the junctions between the first connection terminals 3 and the bump electrodes 8 because of the stress derived from the difference in thermal expansion coefficient between the interposer 1 and the semiconductor chip 7. The crack generation causes a poor electric connection between the first connection terminals 3 and the bump electrodes 8.
An object of the present invention is to provide a structure that absorbs stress at the connection terminals of the substrate so as to prevent crack occurrence at the junction between the first connection terminal and the bump electrode, thereby insuring a good.electrical connection.
According to the present invention, there is provided a semiconductor device, comprising:
a semiconductor chip having a plurality of electrodes;
a substrate on which the semiconductor chip is mounted; and
a plurality of connection terminals arranged to correspond to the semiconductor chip, each connection terminal having one end and the other end,
the one end of each connection terminal being fixed to the substrate, with the other end being bonded to the electrode and rendered free relative to the substrate.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.